共 50 条
- [31] Test generation for primitive path delay faults in combinational circuits 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 636 - 641
- [32] Modeling and testing for stuck faults in pseudo nMOS combinational circuits MICROELECTRONICS AND RELIABILITY, 1996, 36 (05): : 685 - 692
- [33] Modeling and testing for stuck faults in pseudo nMOS combinational circuits Microelectron Reliab, 5 (685-692):
- [38] Combinational Test Generation for Transition Faults in Acyclic Sequential Circuits 2008 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING, VOLS 1 AND 2, 2008, : 398 - 402