共 50 条
- [31] Congestion-driven placement improvement using cell spreading 2006 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1-4: VOL 1: SIGNAL PROCESSING, 2006, : 2415 - 2419
- [32] A new incremental placement algorithm and its application to congestion-aware divisor extraction ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 541 - 548
- [33] A timing-driven global routing algorithm considering channel density minimization for standard cell layout ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4, 1996, : 424 - 427
- [34] Congestion aware layout driven logic synthesis ICCAD 2001: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2001, : 216 - 223
- [36] Pin Accessibility-Driven Cell Layout Redesign and Placement Optimization PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017,
- [37] A new layout-driven timing model for incremental layout optimization PROCEEDINGS OF THE ASP-DAC '97 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1997, 1996, : 127 - 131
- [38] High efficiency clustering algorithm for standard cell placement Tien Tzu Hsueh Pao/Acta Electronica Sinica, 2001, 29 (02): : 148 - 151
- [39] AN ALGORITHM FOR QUADRISECTION AND ITS APPLICATION TO STANDARD CELL PLACEMENT IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1988, 35 (03): : 294 - 303
- [40] Standard Cell Layout Design and Placement Optimization for TFET-Based Circuits 2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2019,