An efficient circulant MIMO equalizer for CDMA downlink: Algorithm and VLSI architecture

被引：0

作者：

Guo, Yuanbin ^{[1
]}

Zhang, Jianzhong ^{[1
]}

McCain, Dennis ^{[1
]}

Cavallaro, Joseph R. ^{[2
]}

机构：

[1] Nokia Research Center, 6000 Connections Drive, Irving, TX 75039, United States

[2] Department of Electrical and Computer Engineering, George R. Brown School of Engineering, Rice University, 6100 Main Street, Houston, TX 77005, United States

来源：

Eurasip Journal on Applied Signal Processing | 2006年 / 2006卷

关键词：

We present an efficient circulant approximation-based MIMOequalizer architecture for the CDMA downlink. This reduces thedirect matrix inverse (DMI) of size ( NF×NF) with O ( ( NF) 3) complexity to some FFT operations with O ( NF Log 2 (F)) complexity and the inverse of some ( N×N) submatrices. We then propose parallel and pipelinedVLSI architectures with Hermitian optimization and reduced-stateFFT for further complexity optimization. Generic VLSIarchitectures are derived for the ( 4×4) high-orderreceiver from partitioned ( 2×2) submatrices. This leadsto more parallel VLSI design with 3× furthercomplexity reduction. Comparative study with both theconjugate-gradient and DMI algorithms shows very promisingperformance/ complexity tradeoff. VLSI design space in terms ofarea/time efficiency is explored extensively for layeredparallelism and pipelining with a Catapult C high-level-synthesismethodology;

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Journal article (JA)

引用

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