JPEG encoder design and its evaluation for dynamic reconfigurable circuit

被引:0
|
作者
School of Science and Engineering, Kinki University, 3-4-1, Kowakae, Higashi-Osaka 577-8502, Japan [1 ]
不详 [2 ]
机构
来源
IEEJ Trans. Electron. Inf. Syst. | / 11卷 / 1733-1740期
关键词
Compilation and indexing terms; Copyright 2025 Elsevier Inc;
D O I
暂无
中图分类号
学科分类号
摘要
Integrated circuit design - Reconfigurable hardware - Signal encoding - Memory architecture - Reconfigurable architectures
引用
收藏
相关论文
共 50 条
  • [41] A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000
    Zhixiong Di
    Yue Hao
    Jiangyi Shi
    Peijun Ma
    Journal of Signal Processing Systems, 2015, 81 : 227 - 247
  • [42] Design and Evaluation of Reconfigurable Filters
    Kumar, E. Senthil
    Joshi, Mangala S.
    Manikandan, J.
    Agrawal, V. K.
    2017 2ND IEEE INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, SIGNAL PROCESSING AND NETWORKING (WISPNET), 2017, : 2021 - 2026
  • [43] VLSI design for embedded digital watermarking JPEG encoder based on digital camera system
    Tsai, TH
    Lu, CY
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2004, E87A (07) : 1772 - 1780
  • [44] A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000
    Di, Zhixiong
    Hao, Yue
    Shi, Jiangyi
    Ma, Peijun
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2015, 81 (02): : 227 - 247
  • [45] Design of an Error-Tolerance Scheme for Discrete Wavelet Transform in JPEG 2000 Encoder
    Hsu, Chun-Lung
    Huang, Yu-Sheng
    Chang, Ming-Da
    Huang, Hung-Yen
    IEEE TRANSACTIONS ON COMPUTERS, 2011, 60 (05) : 628 - 638
  • [46] Memristive Circuit Design of Quantized Convolutional Auto-Encoder
    Zhang, Yaozhong
    Wang, Xiaoping
    Yang, Chao
    Zeng, Zhigang
    IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTATIONAL INTELLIGENCE, 2023, 7 (04): : 1301 - 1313
  • [47] ON THE DESIGN OF A DYNAMIC RECONFIGURABLE NETWORK SWITCH
    SMIT, GJM
    HAVINGA, PJM
    JANSEN, PG
    MICROPROCESSING AND MICROPROGRAMMING, 1992, 34 (1-5): : 59 - 62
  • [48] Dynamic noise model and its application to high speed circuit design
    Choi, SH
    Somasekhar, D
    Roy, K
    MICROELECTRONICS JOURNAL, 2002, 33 (10) : 835 - 846
  • [49] Reconfigurable RF CMOS Circuit Design for Cognitive Radios
    Okada, Kenichi
    Matsuzawa, Akira
    2009 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2009), 2009, : 96 - 99
  • [50] CNTFET modeling and reconfigurable logic-circuit design
    O'Connor, Ian
    Liu, Junchen
    Pregaldiny, Fabien
    Lallement, Christophe
    Maneux, Cristell
    Goguet, Johnny
    Fregonese, Sebastien
    Zimmer, Thomas
    Anghel, Lorena
    Dang, Trong-Trinh
    Leveugle, Regis
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (11) : 2365 - 2379