共 50 条
- [43] VLSI Architecture Design for Inverse-CABAC on H.264 Decoder 2009 INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND INFORMATICS, VOLS 1 AND 2, 2009, : 632 - 635
- [44] Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 273 - 276
- [45] An Area-efficient High-accuracy Prediction-based CABAC Decoder Architecture for H.264/AVC 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2011, : 1960 - 1963
- [46] A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC Journal of Signal Processing Systems, 2008, 50 : 81 - 95
- [48] A context-based error detection strategy into H.264/AVC CABAC 2006 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO - ICME 2006, VOLS 1-5, PROCEEDINGS, 2006, : 689 - +
- [49] Algorithm for H.264/AVC adaptive watermarking Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University, 2023, 50 (03): : 95 - 104
- [50] FPGA prototyping strategy for a H.264/AVC video decoder RSP 2007: 18TH IEEE/IFIP INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, 2007, : 174 - +