Design of multi-FPGAs processor based system for remote sensing image high-speed compression

A design of multi-FPGAs for massive remote sensing image high-speed compression was proposed, which includes a hybrid multi-FPGAs based parallel processor architecture due to light coupling between modules and tight association of a single module; a compression mechanism for balanced data distribution and code stream ordered recycling, which improves parallel efficiency of isomorphic FPGAs and ensures correctness of image compression; a processor failure and link failure supported structure fault-tolerant model, which ensures the reliability of compression; a distributed external storage and high-speed serial bus based communication strategy among multi-FPGAs, which satisfies the communication requirements for massive remote sensing image high-speed compression. Experimental result shows: the parallel efficiency of a single processor achieves 93.5%. In this application system, result of hardware compression is consistent with that of software compression, its throughput reaches 1.6 Gbit/s or more and provides high reliability.