Key technology of invalid block management in NAND flash-based image recorder system

A high-efficiency invalid block management scheme in high-speed and large-capacity image recorder system based on NAND flash was presented. In order to solve the problems of invalid block table's fast search and reliable store, an invalid block information fast search architecture based on bit index was proposed. An invalid block pre-matching mechanism based on glide window was proposed to solve the problem of invalid block's fast matching. In consideration of the disadvantage that burst invalid block would decrease write speed, a lag copy back mechanism was presented. All architectures were implemented in FPGA in form of hardware. The results show that it only takes 2 clock periods to search 8 invalid block information, pre-matching and generating right physical address operations are no clock delay, write speed is not affected by burst invalid block, copy back takes only 22.28036 ms under extremity situation, consecutive write speed is up to 848.65 MB/s, consecutive read speed is up to 1265.5 MB/s, and consecutive erase speed is up to 9120.245 MB/s, the storage capacity is 160 GB, reserved capacity for invalid block management is 8 GB and ECC ability is 1 bit/512 B.