Is RISC-V ready for Space? A Security Perspective

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作者：
Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Italy [1 ]
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不详 [5 ]
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来源：
Proc. IEEE Int. Symp. Defect Fault Toler. VLSI Nanotechnol. Syst., DFT |
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Compilation and indexing terms; Copyright 2024 Elsevier Inc;
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摘要：
Computer hardware - Cost effectiveness - Hardware security - Integrated circuit design - Malware - Side channel attack
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