共 50 条
- [32] Line edge and gate interface roughness Simulations of advanced VLSI SOI-MOSFETs SISPAD 2007: SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2007, 2007, : 101 - +
- [34] GATE ARRAYS FOR VLSI DESIGN IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1982, 5 (01): : 133 - 137
- [37] Challenges and opportunities in high-k gate dielectric technology RAPID THERMAL AND OTHER SHORT-TIME PROCESSING TECHNOLOGIES III, PROCEEDINGS, 2002, 2002 (11): : 99 - 115
- [38] CMOS TECHNOLOGY USING PLASMA NITRIDED OXIDE AS A GATE DIELECTRIC JOURNAL DE PHYSIQUE, 1988, 49 (C-4): : 421 - 424
- [40] Layout Dependence of Gate Dielectric TDDB in HKMG FinFET Technology 2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,