Generating Optimized Code for Parallelism Exploitation to an Unconventional Architecture

被引:1
|
作者
Vieira Do Couto J. [1 ]
Roberto Fernandes De Araujo S. [1 ]
机构
[1] Vieira Do Couto, Juliene
[2] Roberto Fernandes De Araujo, Silvio
来源
| 1967年 / IEEE Computer Society卷 / 15期
关键词
Compiler; Generating Optimized Code; IPNoSys; Levels of Optimization; Optimization;
D O I
10.1109/TLA.2017.8071242
中图分类号
学科分类号
摘要
Along the years, the complexity of processors has increased and with it the demand grows for generating optimized code for them. Therefore, changes in the program, keeping the semantics of the original code and presenting a better performance, known as optimizations are required. The use of non-conventional architectures may be an option for increased performance, as the IPNoSys processor. This processor presents a computer model driven packages which is reflected in its programming model. The objective of this paper is develop the code optimization step in IPNoSys compiler, considering features not explored it, as the parallelism, and even improving your generated code. The optimization modulo offers three levels of optimization. In order to obtain the results a comparison of execution time and memory required of codes generated in the three levels of optimization was performed. The great level optimization reduced at least triple the execution time comparing to no optimized code. Also it was possible reduced the size code by the half in other optimization level. © 2017 IEEE.
引用
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页码:1967 / 1976
页数:9
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