VLSI implementation for video processing IP module based on synchronous and parallel architecture

被引：0
|
作者：
Zhang, Guang-Lie [1 ]
Zheng, Nan-Ning [1 ]
Wu, Yong [1 ]
Zhang, Xia [1 ]
机构：
[1] Xi'an Jiaotong Univ., Xi'an 710049, China
来源：
| 2002年 / Chinese Institute of Electronics卷 / 30期
关键词：
Color space conversion - Color transient improvement - Intellectual property modules - Synchronous parallel architecture - Synopsys EDA tools - System on a chip;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
(Edited Abstract)
引用
收藏
相关论文
共 50 条
  • [21] A Parallel Implementation of IR Video Processing on a GPU
    Jarrah, Amin
    Mirzaei, Golrokh
    Majid, Mohammad Wadood
    Ross, J.
    Jamali, M. M.
    Gorsevski, P. V.
    Frizado, J.
    Bingman, V. P.
    2013 IEEE 56TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2013, : 1160 - 1163
  • [22] Implementation of VLSI on Signal Processing-Based Digital Architecture Using AES Algorithm
    Marimuthu, Mohanapriya
    Rajendran, Santhosh
    Radhakrishnan, Reshma
    Rengarajan, Kalpana
    Khurram, Shahzada
    Ahmad, Shafiq
    Sayed, Abdelaty Edrees
    Shafiq, Muhammad
    CMC-COMPUTERS MATERIALS & CONTINUA, 2023, 74 (03): : 4729 - 4745
  • [23] VLSI Implementation of High Performance Optimized Architecture for Video Coding Standards
    Devi, S. Rukmani
    Rangarajan, P.
    Perinbam, J. Raja Paul
    ACTA POLYTECHNICA HUNGARICA, 2013, 10 (06) : 237 - 249
  • [24] A VLSI BASED MIMD ARCHITECTURE OF A MULTIPROCESSOR SYSTEM FOR REAL-TIME VIDEO PROCESSING APPLICATIONS
    GAEDKE, K
    JESCHKE, H
    PIRSCH, P
    JOURNAL OF VLSI SIGNAL PROCESSING, 1993, 5 (2-3): : 159 - 169
  • [25] Prototype Design of a Cluster-based MPSoC Architecture for Parallel video Processing
    Zhang, Lei
    Li, Da
    2011 INTERNATIONAL CONFERENCE ON FUZZY SYSTEMS AND NEURAL COMPUTING (FSNC 2011), VOL I, 2011, : 314 - 317
  • [26] VLSI architecture for real-time image and video processing systems
    Philip Dang
    Journal of Real-Time Image Processing, 2006, 1 : 57 - 62
  • [27] VLSI architecture for real-time image and video processing systems
    Dang, Philip
    JOURNAL OF REAL-TIME IMAGE PROCESSING, 2006, 1 (01) : 57 - 62
  • [28] Parallel-Processing VLSI Architecture for Mixed Integer Linear Programming
    Noguchi, Hiroki
    Tani, Junichi
    Shimai, Yusuke
    Kawaguchi, Hiroshi
    Yoshimoto, Masahiko
    2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 2362 - 2365
  • [29] Ring-connected trees: a multipurpose VLSI architecture for parallel processing
    Basu, SK
    Dattagupta, J
    Dattagupta, R
    MICROPROCESSORS AND MICROSYSTEMS, 1998, 21 (05) : 291 - 298
  • [30] A Generic Pixel Distribution Architecture for Parallel Video Processing
    Ali, Karim M. A.
    Ben Atitallah, Rabie
    Hanafi, Said
    Dekeyser, Jean-Luc
    2014 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2014,
12345