Shadow masks as an alternative method to lithography for the structuring of thin film layers on LTCC substrates

被引:0
|
作者
Bartsch H. [1 ]
Jaziri N. [1 ]
Jaekel K. [1 ]
Nessimian N. [1 ]
Müller J. [1 ]
机构
[1] Technische Universität Ilmenau, Institute of Micro- and Naotechnologies MacroNano®, Electronics Technology Group, Gustav-Kirchhoff-Str. 1, Ilmenau
来源
Advancing Microelectronics | 2023年 / 2023卷
关键词
low temperature co-fired ceramics; physical vapor deposition; polyimide; shadow mask; Thin film technology;
D O I
10.4071/001c.89092
中图分类号
学科分类号
摘要
The combination of low temperature cofired ceramic multilayer technology with thin film deposition methods enables new functional principles by expanding the available portfolio of materials. Low-stress integration of micromechanical chips can be achieved, for example, by using reactive multilayers as local heat sources, which can be deposited directly onto the ceramics. Shadow masks are ideal for structuring these multilayers. The technology has the advantage that the layers are patterned without the use of etching chemicals and no residues of masking layers or photoresist remain on the non-coated areas. Flexible polyimide used to cover the non-coated areas can adapt to the surface unevenness of the ceramic. The polymer has excellent temperature stability and is compatible with vacuum coating processes. It is available in various thickness gradations and can be easily structured by laser cutting. The accuracy of the mask fabrication by means of laser cut is studied in this work. Structures with a line width of 30 µm can be precisely cut into 75 µm thick polyimide foils. Mask and chip are mechanically aligned, thus a positioning accuracy of 70 µm and better when using the outer edge of mask and chip for alignment is achievable. Major influences of the laser process on the precision of the mask and the resulting transfer fidelity to the ceramic surface are discussed. The method is suitable for reliably reproducing layers with structure sizes from 30 µm with a pitch of 150 µm. © 2023 IMAPS-International Microelectronics and Packaging Society. All rights reserved.
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页码:1 / 4
页数:3
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