共 50 条
- [41] Investigation on the effect of multiple parameters towards thermal management in 3D Stacked ICs 2016 17TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2016, : 514 - 519
- [43] Thermal Management and Processing Optimization for 3D Multi-layer Stacked ICs 2019 25TH INTERNATIONAL WORKSHOP ON THERMAL INVESTIGATIONS OF ICS AND SYSTEMS (THERMINIC 2019), 2019,
- [44] Co-design of Reliable Signal and Power Interconnects in 3D Stacked ICs PROCEEDINGS OF THE 2009 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2009, : 56 - 58
- [45] An Integrated Temperature-Cycling Acceleration and Test Technique for 3D Stacked ICs 2015 20TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2015, : 526 - 531
- [46] Multiphysics Modeling of integrated microfluidic-thermoelectric cooling for stacked 3D ICs NINETEENTH ANNUAL IEEE SEMICONDUCTOR THERMAL MEASUREMENT AND MANAGEMENT SYMPOSIUM, 2003, : 35 - 41
- [47] Co-Design of Multicore Architectures and Microfluidic Cooling for 3D Stacked ICs 2013 19TH INTERNATIONAL WORKSHOP ON THERMAL INVESTIGATIONS OF ICS AND SYSTEMS (THERMINIC), 2013, : 237 - 242
- [48] High Speed I/O and Thermal Effect Characterization of 3D Stacked ICs 2009 IEEE INTERNATIONAL CONFERENCE ON 3D SYSTEMS INTEGRATION, 2009, : 416 - +
- [50] A Study of Stacking Limit and Scaling in 3D ICs: An Interconnect Perspective 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 1213 - 1220