An L-shaped low on-resistance current path SOI LDMOS with dielectric field enhancement

A low specific on-resistance(R on;sp/ SOI NBL TLDMOS(silicon-on-insulator trench LDMOS with an N buried layer) is proposed. It has three features: a thin N buried layer(NBL) on the interface of the SOI layer/buried oxide(BOX) layer, an oxide trench in the drift region, and a trench gate extended to the BOX layer.First, on the on-state, the electron accumulation layer forms beside the extended trench gate; the accumulation layer and the highly doping NBL constitute an L-shaped low-resistance conduction path, which sharply decreases the R on;sp. Second, in the y-direction, the BOX's electric field(E-field) strength is increased to 154 V/ m from48 V/ m of the SOI Trench Gate LDMOS(SOI TG LDMOS) owing to the high doping NBL. Third, the oxide trench increases the lateral E-field strength due to the lower permittivity of oxide than that of Si and strengthens the multiple-directional depletion effect. Fourth, the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Therefore, the SOI NBL TLDMOS structure not only increases the breakdown voltage(BV), but also reduces the cell pitch and R on;sp. Compared with the TG LDMOS, the NBL TLDMOS improves the BV by 105% at the same cell pitch of 6 m, and decreases the R on;sp by 80% at the same BV.