共 42 条
- [31] A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuits ESSCIRC 2005: PROCEEDINGS OF THE 31ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2005, : 125 - 128
- [33] A 0.1-4.71 GHz Integer-N CP-PLL-Based Low-Power Frequency Synthesizer for High-Speed Applications EMERGING VLSI DEVICES, CIRCUITS AND ARCHITECTURES, VDAT 2023, 2025, 1234 : 25 - 36
- [35] Triple-threshold static power minimization technique in high-level synthesis for designing high-speed low-power SOC applications using 90nm MTCMOS technology 2007 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, VOLS 1-3, 2007, : 1671 - 1674
- [37] Symmetrical, Low-Power, and High-Speed 1-Bit Full Adder Cells Using 32nm Carbon Nanotube Field-effect Transistors Technology INTERNATIONAL JOURNAL OF ENGINEERING, 2015, 28 (10): : 1447 - 1454
- [38] Gate-level dual-threshold static power optimization methodology (GDSPOM) for designing high-speed low-power SOC applications using 90nm MTCMOS technology 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 3650 - +