A FPGA-based Energy-Efficient Processor for Radar-based Continuous Fall Detection

被引:0
|
作者
Chen, Juhua [1 ]
Yang, Linxin [1 ]
Ye, Wenbin [1 ]
机构
[1] Shenzhen Univ, Coll Elect & Informat Engn, Shenzhen, Peoples R China
关键词
Fall detection; convolutional neural network; FPGA; radar signal processing; low power; low cost;
D O I
10.1109/ISCAS58744.2024.10558171
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This paper proposes a FPGA-based energy-efficient processor for radar-based continuous fall detection, consisting of a spectrogram generation circuit and a convolutional neural network (CNN). To reduce resource consumption and power usage of the entire processor, two designs were implemented: 1) A serial-FFT-based spectrogram generation circuit for radar signal preprocessing, and 2) An neural network (NN) accelerator based on row-stationary dataflow has been designed. By using the updated block wise computation technique, the accelerator enables the computation of only the NN's updated inputs, resulting in an 85% reduction in multiply-accumulate (MAC) operations and a 79% reduction in intermediate result storage. Implemented on the Xilinx FPGA board ZC702, this processor consumes only 73k LUTs, 3.6k Flip Flops (FFs), 22 Block RAMs (BRAMs), and 10 DSPs, with a power consumption of only 0302W. On an open-source radar fall detection dataset, this processor achieves an accuracy of 99.58%. The processor incurs a delay of only 0.431ms for a single preprocessing and NN inference, consuming just 130.16 mu J.
引用
收藏
页数:5
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