共 50 条
- [1] Efficient digit-serial normal basis multipliers over GF(2M) 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, 2002, : 781 - 784
- [4] Super Digit-Serial Systolic Multiplier Over GF(2m) 2012 SIXTH INTERNATIONAL CONFERENCE ON GENETIC AND EVOLUTIONARY COMPUTING (ICGEC), 2012, : 509 - 513
- [6] Low Complexity Digit-serial Multiplier Over GF(2m) Using Karatsuba Technology 2013 SEVENTH INTERNATIONAL CONFERENCE ON COMPLEX, INTELLIGENT, AND SOFTWARE INTENSIVE SYSTEMS (CISIS), 2013, : 461 - 466
- [7] Digit-serial systolic architectures for inversions over GF (2m) 2006 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS DESIGN AND IMPLEMENTATION, 2006, : 77 - 82
- [8] Concurrent Error Detection in Digit-Serial Normal Basis Multiplication over GF(2m) 2008 22ND INTERNATIONAL WORKSHOPS ON ADVANCED INFORMATION NETWORKING AND APPLICATIONS, VOLS 1-3, 2008, : 1499 - 1504
- [9] A novel digit-serial dual basis systolic karatsuba multiplier over GF(2m) Lin, J.-M. (jimmy@fcu.edu.tw), 1600, Computer Society of the Republic of China (23):