Low-Power Encoder and Compressor Design for Approximate Radix-8 Booth Multiplier

In this paper, we propose an innovative design for low-power approximate radix-8 Booth multipliers, presenting a promising solution to significantly reduce power consumption in error-resilient signal processing applications. The approach simultaneously approximates both the partial product generation and accumulation stages using an approximate Booth encoder and a 4-2 compressor, achieving substantial energy savings compared to previous designs. Extensive simulations on FIR filtering and image classification validate the method, demonstrating the proposed approximate Booth multiplier's attractive trade-offs between energy efficiency and accuracy. Experimental results show a remarkable 20% energy reduction compared to the traditional exact Booth multiplier in FIR filtering and image classification, with negligible accuracy loss.