Deep random forest with ferroelectric analog content addressable memory

被引:2
|
作者
Yin, Xunzhao [1 ,2 ]
Mueller, Franz [3 ]
Laguna, Ann Franchesca [4 ]
Li, Chao [1 ]
Huang, Qingrong [1 ]
Shi, Zhiguo [1 ,2 ]
Lederer, Maximilian [3 ]
Laleni, Nellie [3 ]
Deng, Shan [5 ]
Zhao, Zijian [5 ]
Imani, Mohsen [6 ]
Shi, Yiyu [5 ]
Niemier, Michael [5 ]
Hu, Xiaobo Sharon [5 ]
Zhuo, Cheng [1 ,2 ]
Kaempfe, Thomas [3 ]
Ni, Kai [5 ]
机构
[1] Zhejiang Univ, Hangzhou, Zhejiang, Peoples R China
[2] Key Lab CS&AUS Zhejiang Prov, Hangzhou, Peoples R China
[3] Fraunhofer IPMS, Dresden, Germany
[4] De La Salle Univ, Manila, Philippines
[5] Univ Notre Dame, Notre Dame, IN 46614 USA
[6] Univ Calif Irvine, Irvine, CA 92697 USA
来源
SCIENCE ADVANCES | 2024年 / 10卷 / 23期
关键词
INFERENCE; EDGE;
D O I
10.1126/sciadv.adk8471
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
Deep random forest (DRF), which combines deep learning and random forest, exhibits comparable accuracy, interpretability, low memory and computational overhead to deep neural networks (DNNs) in edge intelligence tasks. However, efficient DRF accelerator is lagging behind its DNN counterparts. The key to DRF acceleration lies in realizing the branch-split operation at decision nodes. In this work, we propose implementing DRF through associative searches realized with ferroelectric analog content addressable memory (ACAM). Utilizing only two ferroelectric field effect transistors (FeFETs), the ultra-compact ACAM cell performs energy-efficient branch-split operations by storing decision boundaries as analog polarization states in FeFETs. The DRF accelerator architecture and its model mapping to ACAM arrays are presented. The functionality, characteristics, and scalability of the FeFET ACAM DRF and its robustness against FeFET device non-idealities are validated in experiments and simulations. Evaluations show that the FeFET ACAM DRF accelerator achieves similar to 10(6)x/10x and similar to 10(6)x/2.5x improvements in energy and latency, respectively, compared to other DRF hardware implementations on state-of-the-art CPU/ReRAM.
引用
收藏
页数:11
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