Electrostatic Microelectromechanical Logic Devices Made by CMOS-compatible Surface Micromachining

被引:0
|
作者
Mita M. [1 ]
Ataka M. [2 ]
Toshiyoshi H. [2 ]
机构
[1] Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency, 3-1-1, Yoshinodai, Chuoh-ku, Sagamihara, Kanagawa
[2] Institute of Industrial Science, University of Tokyo, 4-6-1, Komaba, Meguro-ku, Tokyo
来源
基金
日本学术振兴会;
关键词
Electrostatic; Mechanical logic; MEMS; Space application; XNOR; XOR;
D O I
10.1541/ieejsmas.140.2
中图分类号
学科分类号
摘要
We have developed new microelectromechanical logic gate devices using microelectromechanical systems (MEMS) technology based on gold electroplating on a silicon wafer. Each device comprises a single cantilever and two or more electrostatic drive electrodes with an ohmic contact-pad for electrical fan-out. The results are read out as a voltage through a pull-down or pull-up resistor. Although most electronic transistor logic gates are composed of four transistors or more, the device used in this work was made with a single cantilever that could be tailored as various types of logic gates such as NOT, NAND, exclusive NOR (XNOR), and exclusive OR (XOR). For this reason, the scheme of the developed device offers scalability by which to reduce its footprint even further. The microelectromechanical operation of the logic was demonstrated and confirmed experimentally. These devices have potential as stable logic-memory circuits that could be used in harsh environments, such as in high-altitude space applications. © 2020 The Institute of Electrical Engineers of Japan.
引用
收藏
页码:2 / 13
页数:11
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