Optimal Chip Layout on a Printed Circuit Board Using Design Sensitivity Analysis of Subdomain Configuration

被引：1

作者：

Joo, Seo Jin ^{[1
]}

Kwak, Byung Man ^{[1
]}

机构：

[1] Korea Adv Inst Sci & Technol, Dept Mech Engn, 373-1 Kusong Dong, Taejon 305701, South Korea

来源：

JOURNAL OF ELECTRONIC PACKAGING | 1995年 / 117卷 / 04期

关键词：

D O I：

10.1115/1.2792105

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A chip layout problem is formulated as a new class of shape optimal design called a subdomain optimization, where the chips correspond to subdomains whose configuration and location are to be decided. Shape design sensitivity analysis for a perturbed subdomain is made based on the concept of material derivative and adjoint system. Introducing a suitable category of design velocity fields, the change of the configuration is adequately describable. Sensitivities and optimal positions of chips on a printed circuit board are obtained and their accuracy discussed.

引用

页码：275 / 280

页数：6

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