Development of Image Recognition Processor Based on Configurable Processor

被引:4
|
作者
Miyamori, Takashi [1 ]
Tanabe, Jun [1 ]
Taniguchi, Yasuhiro [2 ]
Furukawa, Kenji [2 ]
Kozakaya, Tatsuo [2 ]
Nakai, Hiroaki [2 ]
Miyamoto, Yukimasa [1 ]
Maeda, Ken-ichi [2 ]
Matsui, Masataka [1 ]
机构
[1] Toshiba Co Ltd, Semicond Co, SoC Res & Dev Ctr, Saiwai Ku, 580-1 Horikawa Cho, Kawasaki, Kanagawa 2128520, Japan
[2] Toshiba Co Ltd, Corp Res & Dev Ctr, Saiwai Ku, Kawasaki, Kanagawa 2128582, Japan
关键词
VLIW; configurable processor; image recognition; intelligent vehicle; ITS;
D O I
10.20965/jrm.2005.p0437
中图分类号
TP24 [机器人技术];
学科分类号
080202 ; 1405 ;
摘要
We developed an image recognition processor, "Visconti," based on a configurable processor. Three VLIW processors that execute three instructions in parallel are integrated into a single chip with peripheral modules such as video I/Os and an SDRAM controller. Each VLIW processor has a RISC processor core and a VLIW coprocessor dedicated to image processing. The coprocessor executes SIMD instructions such as 8-parallel byte. Visconti was fabricated using 0.13 mu m CMOS technology, operates at 150MHz, and consumes about 1W. We present actual application examples of Visconti, onboard surveillance for automobiles and face recognition. Compared to cases in which only the processor core is used, execution speed per one processor increases about 16 times for onboard surveillance and about five times per three processors for face recognition. These applications can be processed in real time.
引用
收藏
页码:437 / 446
页数:10
相关论文
共 50 条
  • [21] A configurable AES processor for enhanced security
    Su, Chih-Pin
    Horng, Chia-Lung
    Huang, Chih-Tsun
    Wu, Cheng-Wen
    ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2005, : 361 - 366
  • [22] Image recognition algorithm for exercise fatigue based on FPGA processor and motion image capture
    Tang, Nana
    Microprocessors and Microsystems, 2021, 81
  • [23] DynamicISP: Dynamically Controlled Image Signal Processor for Image Recognition
    Yoshimura, Masakazu
    Otsuka, Junji
    Irie, Atsushi
    Ohashi, Takeshi
    2023 IEEE/CVF INTERNATIONAL CONFERENCE ON COMPUTER VISION (ICCV 2023), 2023, : 12820 - 12830
  • [24] Image recognition algorithm for exercise fatigue based on FPGA processor and motion image capture
    Tang, Nana
    MICROPROCESSORS AND MICROSYSTEMS, 2021, 81
  • [25] Configurable verification stimulus acceleration method based on multicore processor
    Pan, Guoteng
    Tang, Yuxing
    Ou, Guodong
    Luo, Li
    Yang, Qingna
    Open Cybernetics and Systemics Journal, 2014, 8 (01): : 17 - 21
  • [26] xDSPcore: A complier-based configurable digital signal processor
    Krall, A
    Pryanishnikov, I
    Hirnschrott, U
    Panis, C
    IEEE MICRO, 2004, 24 (04) : 67 - 78
  • [27] An Accuracy Dynamically Configurable FFT Processor Based on Approximate Computing
    Ma, Liping
    Zhang, Xiaoyu
    Bai, Yuxin
    Chen, Xin
    Zhang, Ying
    Shanghai Jiaotong Daxue Xuebao/Journal of Shanghai Jiaotong University, 2022, 56 (02): : 223 - 230
  • [28] S5: The architecture and development flow of a software configurable processor
    Arnold, JM
    FPT 05: 2005 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, 2005, : 121 - 128
  • [29] The architecture and development flow of the S5 software configurable processor
    Arnold, Jeffrey M.
    JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2007, 47 (01): : 3 - 14
  • [30] The Architecture and Development Flow of the S5 Software Configurable Processor
    Jeffrey M. Arnold
    The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 2007, 47 : 3 - 14