FABRICATION AND CHARACTERIZATION OF MULTILEVEL LATERAL NANO-DEVICES

The design of surface gate patterns, used to define nanostructures in AlGaAs/GaAs heterostructures, is greatly enhanced by the possibility of establishing electrical contact to, and independently biasing, a 100 nm wide isolated gate. We describe the fabrication of a multi-level metallisation architecture which can be used to contact a nanoscale central gate and monitor the transition from a quantum dot to ring geometry. We employ geometry induced quantum interference effects as a novel low temperature characterisation tool and report experiments in which the central electrode acts as an artificial impurity.