HIGH-PERFORMANCE FULLY DEPLETED SILICON-ON-INSULATOR TRANSISTORS

被引:13
|
作者
MACELWEE, TW [1 ]
CALDER, ID [1 ]
BRUCE, RA [1 ]
SHEPHERD, FR [1 ]
机构
[1] BELL NO RES,OTTAWA K1Y 4H7,ONTARIO,CANADA
关键词
D O I
10.1109/16.106239
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Thin single-crystal silicon-on-insulator films with defect densities as low as 8 × 105; dislocations/cm2 were formed by implantation of 1.5 × 1018 O+ /cm2 at 150 kV into bare silicon and annealing at 1350°C for 6 h in nitrogen. Thin-film submicrometer MOS transistors were fabricated with self-aligned TiSi2 fully covering sources, drains, and gates, and with p+ and n+ polysilicon gates for PMOS and NMOS transistors, respectively, but without a lightly doped drain. Transistors with gate lengths as short as 0.4 µm exhibited essentially long-channel behavior with no kink and with a high saturation current. The device physics was investigated using PISCES simulations, which agreed well with the experimental results. A ring-oscillator stage delay of 58 ps was obtained for 1.0-µm gate length CMOS circuits operating at 5 V. © 1990 IEEE
引用
收藏
页码:1444 / 1451
页数:8
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