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- [24] A high-performance VLSI architecture for advanced encryption standard (AES) algorithm 19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 481 - 484
- [25] A High-Performance VLSI Architecture for Variable Block Size Motion Estimation 2014 IEEE 3RD GLOBAL CONFERENCE ON CONSUMER ELECTRONICS (GCCE), 2014, : 123 - 124
- [27] A High-performance VLSI Architecture of the PRESENT Cipher and its Implementations for SoCs 2018 31ST IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2018, : 96 - 101
- [30] VLSI Architecture of a High-Performance Neural Spiking Activity Simulator Based on Generalized Volterra Kernel 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC), 2014, : 272 - 275