Hardware Realization of a 2-D IIR Semisystolic Filter with Application to Real-Time Homomorphic Filtering

被引：6

作者：

Kaufman, H. J. ^{[1
]}

Sid-Ahmed, M. A. ^{[1
]}

机构：

[1] Univ Windsor, Dept Elect Engn, Windsor, ON N9B 3P4, Canada

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY | 1993年 / 3卷 / 01期

关键词：

D O I：

10.1109/76.180686

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Hardware design and implementation of a 2-D sample-and-hold semisystolic filter structure are presented. Log and antilog circuits are used with a high-frequency-emphasis IIR filter to provide homomorphic filtering. SPICE simulation using functional blocks as well as particulars on the hardware design with reference to specific device types and characteristics are advanced. A hardware prototype circuit using MSI and LSI circuits on a custom-made PCB is shown along with applications to real-time filtering of broadcasted TV images.

引用

页码：2 / 14

页数：13

共 50 条

[41] An efficient hardware realization of EMD for real-time signal processing applications
Das, Kaushik
Pradhan, Sambhu Nath
Das, Kaushik (kaushikece.sch@nita.ac.in), 1600, John Wiley and Sons Ltd (48): : 2202 - 2218
[42] 2-D TWO-FOLD SYMMETRIC CIRCULAR SHAPED FILTER DESIGN WITH HOMOMORPHIC PROCESSING APPLICATION
Seneviratne, A. J.
Kha, H. H.
Tuan, H. D.
Nguyen, T. Q.
2010 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, 2010, : 3694 - 3697
[43] A HARDWARE FILTER FOR REAL-TIME SPECKLE SUPPRESSION IN ULTRASONOGRAPHIC SCANS
LOUPAS, T
ANDERSON, T
MCDICKEN, WN
ALLAN, PL
BRITISH JOURNAL OF RADIOLOGY, 1988, 61 (726): : 556 - 557
[44] Examination of Direct Form vs. WDF Realization of a 2-D Quadrantal Fan Filter in FPGA Hardware
Velten, Joerg
Wagner, Daniel
Kolonko, Lech
Kalischewski, Kathrin
Tilgner, Stephan
Schwerdtfeger, Tim
Kummert, Anton
2017 10TH INTERNATIONAL WORKSHOP ON MULTIDIMENSIONAL (ND) SYSTEMS (NDS), 2017,
[45] A NEW REALIZATION FOR MULTIPROCESSOR IMPLEMENTATION OF 2-D DENOMINATOR-SEPARABLE DIGITAL-FILTERS FOR REAL-TIME PROCESSING
RAGHURAMIREDDY, D
UNBEHAUEN, R
IEEE TRANSACTIONS ON SIGNAL PROCESSING, 1992, 40 (09) : 2349 - 2353
[46] 2-D digital filter realization without overflow oscillations
Singh, Vimal
NONLINEAR ANALYSIS-REAL WORLD APPLICATIONS, 2013, 14 (03) : 1503 - 1510
[47] A Pipelined Parallel Hardware Architecture for 2-D Real-Time Electrical Capacitance Tomography Imaging Using Interframe Correlation
Meribout, Mahmoud
Teniou, Samir
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25 (04) : 1320 - 1328
[48] Hardware Design of Fast HEVC 2-D IDCT Targeting Real-Time UHD 4K Applications
Conceicao, Ruhan
Araujo, Andrio
Porto, Marcelo
Zatt, Bruno
Agostini, Luciano
2015 IEEE 6TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2015,
[49] 2-D realization of WiMAX channel interleaver for efficient hardware implementation
Asghar, Rizwan
Liu, Dake
World Academy of Science, Engineering and Technology, 2009, 39 : 25 - 29
[50] Hardware Implementation of a Real-time Genetic Algorithm for Adaptive Filtering Applications
Merabti, Hocine
Massicotte, Daniel
2014 IEEE 27TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE), 2014,

← 1 2 3 4 5 →