ARCHITECTURE OF A FIELD-PROGRAMMABLE SMART PIXEL ARRAY

The architecture and complexity analysis of a 2 dimensional array of smart pixels which can be user programmed to implement arbitrary functions, including binary sorting or switching nodes or HyperPlane switching nodes, is described. A large array where each pixel can be programmed independently may require a hundred thousand bits of control memory. A programmable architecture which exploits the symmetry inherent in smart pixel arrays and reduces the control memory requirements by a few orders of magnitude is proposed. A complexity analysis indicates that mask-programmable arrays with the equivalent of 112 x 112 pixels and field programmable arrays with the equivalent of 64 x 64 pixels are achievable on a 1 an(2) MOS die. The use of programmable arrays can automate the VLSI mask design process, can allow for cost reduction through larger production volumes, and can allow for standardization in pixel pitch, optical and opto-mechanical packaging assemblies, electronic packaging assemblies and other supporting technologies.