The hybrid field-programmable architecture

被引：14
|
作者：
Kaviani, A [1 ]
Brown, S [1 ]
机构：
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
来源：
IEEE DESIGN & TEST OF COMPUTERS | 1999年 / 16卷 / 02期
关键词：
D O I：
10.1109/54.765206
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The authors propose a new architecture that combines two existing technologies: lookup-table-based FPGAs and complex programmable logic devices based on PLA-like blocks. Their mapping results indicate that on overage LUT-based FPGAs require 78% more area than their hybrid FPGA, while providing roughly the same circuit depth.
引用
收藏
页码：74 / 83
页数：10
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