INSULIN - AN INSTRUCTION SET SIMULATION ENVIRONMENT

We present Insulin, a new environment for the simulation of user-defined, application specific programmable processors (ASPP). This environment is based on a reconfigurable VHDL model of a generic instruction set processor. The environment supports parallel instruction streams, cycle true simulation, arbitrary addressing modes, multi-cycle instructions, pipelining and user specified memory, register file and stack sizes. In our approach, the behavior of a user-defined instruction set (I/S) is expressed in terms of the generic instructions supported by the VHDL model. From this US definition, the tool automatically generates a cross-assembler which converts application-specific assembly code to the generic assembly code, which can be simulated A graphic interface allows the user to interact with the model at the suitable level during the simulation. Insulin is part of an overall ASPP design environment at BM which includes a retargetable code generator.