共 50 条
- [42] REVIEW OF BUILT-IN TEST METHODOLOGIES FOR GATE ARRAYS IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1985, 132 (02): : 121 - 129
- [43] REVIEW OF BUILT-IN TEST METHODOLOGIES FOR GATE ARRAYS IEE PROCEEDINGS-I COMMUNICATIONS SPEECH AND VISION, 1985, 132 (02): : 121 - 129
- [44] Tuning circuits in systems of built-in testing Avtomatika i Telemekhanika, 1995, (03): : 179 - 183
- [45] BUILT-IN SELF TESTING OF EMBEDDED MEMORIES IEEE DESIGN & TEST OF COMPUTERS, 1986, 3 (05): : 27 - 37
- [49] A simple approach to the design of one-dimensional sparse arrays 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS, 2004, : 541 - 544