共 50 条
- [41] Digital signal processing with digit-serial RNS arithmetic PROCEEDINGS OF THE 39TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 1996, : 537 - 540
- [42] Error detection in Signed Digit arithmetic circuit with parity checker 18TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2003, : 401 - 408
- [43] Arithmetic circuits combining residue and signed-digit representations ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, 2003, 2823 : 246 - 257
- [44] Fast Arithmetic Using Signed Digit Numbers and Ternary Logic MODELLING OF ENGINEERING AND TECHNOLOGICAL PROBLEMS, 2009, 1146 : 488 - +
- [45] Quaternary signed-digit arithmetic operations for optical computing PHOTONIC DEVICES AND ALGORITHMS FOR COMPUTING, 1999, 3805 : 258 - 263
- [47] DESIGNING SYSTOLIC ARRAYS USING DIGIT-SERIAL ARITHMETIC IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1992, 39 (01): : 62 - 65