Effect of annealing process on the surface roughness in multiple Al implanted 4H-SiC

被引:8
|
作者
Wu Hailei [1 ]
Sun Guosheng [1 ]
Yang Ting [1 ]
Yan Guoguo [1 ]
Wang Lei [1 ]
Zhao Wanshun [1 ]
Liu Xingfang [1 ]
Zeng Yiping [1 ]
Wen Jialiang [2 ]
机构
[1] Chinese Acad Sci, Inst Semicond, Novel Semicond Mat Lab, Beijing 100083, Peoples R China
[2] China Elect Power Res Inst, Beijing 100192, Peoples R China
基金
中国国家自然科学基金;
关键词
4H-SiC; ion implantation; annealing; surface morphology;
D O I
10.1088/1674-4926/32/7/072002
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
A P-layer can be formed on a SiC wafer surface by using multiple Al ion implantations and postimplantation annealing in a low pressure CVD reactor. The Al depth profile was almost box shaped with a height of 1 x 10 1 9 cm(3) and a depth of 550 nm. Three different annealing processes were developed to protect the wafer surface. Variations in RMS roughness have been measured and compared with each other. The implanted SiC, annealed with a carbon cap, maintains a high-quality surface with an RMS roughness as low as 3.8 nm. Macrosteps and terraces were found in the SiC surface, which annealed by the other two processes (protect in Ar/protect with SiC capped wafer in Ar). The RMS roughness is 12.2 nm and 6.6 nm, respectively.
引用
收藏
页数:4
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