A COMPACT POWER-EFFICIENT 3-V CMOS RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL-AMPLIFIER FOR VLSI CELL LIBRARIES

被引：300

作者：

HOGERVORST, R ^{[1
]}

TERO, JP ^{[1
]}

ESCHAUZIER, RGH ^{[1
]}

HUIJSING, JH ^{[1
]}

机构：

[1] USA APPLICAT SPECIF BUSINESS GRP,PHILIPS SEMICOND,SUNNYVALE,CA 94088

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1994年 / 29卷 / 12期

关键词：

D O I：

10.1109/4.340424

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm(2), it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation has been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF.

引用

页码：1505 / 1513

页数：9

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