An FPGA-based high-speed network performance measurement for RFC 2544

被引:0
|
作者
Yong Wang
Yong Liu
Xiaoling Tao
Qian He
机构
[1] Guilin University of Electronic Technology,CSIP Guangxi Center
[2] Guilin University of Electronic Technology,College of Computer Science and Engineering
[3] Guilin University of Electronic Technology,College of Information and Communication
关键词
RFC 2544; Active measurement; Passive measurement; Traffic generator; Interval stretching; Network performance measurement;
D O I
暂无
中图分类号
学科分类号
摘要
Aiming at the problem that existing network performance measurements have low accuracy for (Request for Comments) RFC 2544, this paper proposes a high-speed network performance measurement based on field-programmable gate array (FPGA). The active measurement method is used to generate probe data frames, and a passive measurement method is employed to count network traffic. According to the statistical laws based on throughput variation, interval stretching mechanism is used to dynamically adjust interframe gap. When our approach approaches the maximum throughput, the network performance parameters are achieved. A prototype based on NetFPGA is also implemented for evaluation. Experimental results show that our approach can be applied in high-speed network and the latency can be accurate to the nanosecond. Compared with network performance measurement using software to send probe data frames and a similar work based on FPGA, our approach can be more flexible and the evaluation data are more accurate.
引用
收藏
相关论文
共 50 条
  • [21] A High-Speed FPGA-Based Hardware Implementation for Leighton-Micali Signature
    Song, Yifeng
    Hu, Xiao
    Tian, Jing
    Wang, Zhongfeng
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 70 (01) : 241 - 252
  • [22] High-Speed Power Allocation in NOMA System Using FPGA-Based DNN
    Yanamala, Rama Muni Reddy
    Pullakandam, Muralidhar
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2024, 33 (14)
  • [23] An FPGA-based approach to high-speed simulation of conductance-based neuron models
    E. L. Graas
    E. A. Brown
    Robert H. Lee
    Neuroinformatics, 2004, 2 : 417 - 435
  • [24] FPGA-based high-speed true random number generator for cryptographic applications
    Kwok, Sammy H. M.
    Lam, Edmund Y.
    TENCON 2006 - 2006 IEEE REGION 10 CONFERENCE, VOLS 1-4, 2006, : 774 - +
  • [25] A FPGA-based Communication Scheme of Classical Channel in High-speed QKD system
    Li, Qiong
    Ma, Siyou
    Mao, Haokun
    Meng, Lin
    2014 TENTH INTERNATIONAL CONFERENCE ON INTELLIGENT INFORMATION HIDING AND MULTIMEDIA SIGNAL PROCESSING (IIH-MSP 2014), 2014, : 227 - 230
  • [26] An FPGA-based approach to high-speed simulation of conductance-based neuron models
    Graas, EL
    Brown, EA
    Lee, RH
    NEUROINFORMATICS, 2004, 2 (04) : 417 - 435
  • [27] High-Speed Fault Classification in Power Lines: Theory and FPGA-Based Implementation
    Valsan, Simi P.
    Swarup, K. Shanti
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2009, 56 (05) : 1793 - 1800
  • [28] A Self-Repairing and Adaptive FPGA-based High-speed Serial Link
    Giordano, R.
    Perrella, S.
    Barbieri, D.
    2018 IEEE NUCLEAR SCIENCE SYMPOSIUM AND MEDICAL IMAGING CONFERENCE PROCEEDINGS (NSS/MIC), 2018,
  • [29] Optimized FPGA-based elliptic curve cryptography processor for high-speed applications
    Jarvinen, Kimmo
    INTEGRATION-THE VLSI JOURNAL, 2011, 44 (04) : 270 - 279
  • [30] High-Speed and Adaptive FPGA-Based Privacy Amplification in Quantum Key Distribution
    Li, Qiong
    Yan, Bing-Ze
    Mao, Hao-Kun
    Xue, Xiao-Feng
    Han, Qi
    Guo, Hong
    IEEE ACCESS, 2019, 7 : 21482 - 21490