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- [21] Hardware Implementation of a Chaos Based Image Encryption Using High-Level Synthesis 2021 29TH IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE), 2021, : 165 - 169
- [23] Hardware Reusability Optimization for High-Level Synthesis of Component-Based Processors 2022 11TH INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS (ICCCAS 2022), 2022, : 64 - 70
- [24] Range and Bitmask Analysis for Hardware Optimization in High-Level Synthesis 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2013, : 773 - 779
- [25] Hardware Implementation of the SUMIS Detector using High-Level Synthesis 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 2972 - 2975
- [28] A Hardware Acceleration Based on High-Level Synthesis Approach for Glucose-Insulin Analysis INTERNATIONAL CONFERENCE ON ENGINEERING, SCIENCE AND NANOTECHNOLOGY 2016 (ICESNANO 2016), 2017, 1788
- [29] Optimized FPGA Implementations of Demanding PLC Programs Based on Hardware High-Level Synthesis 2008 IEEE INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION, PROCEEDINGS, 2008, : 1002 - +