共 50 条
- [41] An efficient hardware design for euclidean key equation solver in Reed-Solomon decoders 2005 ASIA-PACIFIC CONFERENCE ON COMMUNICATIONS (APCC), VOLS 1& 2, 2005, : 982 - 985
- [43] Low hardware complexity key equation solver chip for Reed-Solomon decoders 2007 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS, 2007, : 51 - 54
- [44] Hardware Complexities of Algebraic Soft-decision Reed-Solomon Decoders and Comparisons 2010 INFORMATION THEORY AND APPLICATIONS WORKSHOP (ITA), 2010, : 558 - 567
- [45] Decoding of Reed-Solomon codes for additive cost functions ISIT: 2002 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY, PROCEEDINGS, 2002, : 313 - 313
- [46] High-Speed Low-Complexity Architecture for Reed-Solomon Decoders IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2010, E93D (07): : 1824 - 1831
- [47] Area-efficient Recursive Degree Computationless Modified Euclid's Architecture for Reed-Solomon Decoder 2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2014,
- [49] A high-speed pipelined degree-computationless modified euclidean algorithm architecture for Reed-Solomon decoders 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 901 - +