Very thin crystalline silicon cells: A way to improve the photovoltaic performance at elevated temperatures

In general, the conversion efficiency of solar cells decreases with the increase in temperature. This temperature dependence is mitigated by enhancing the open circuit voltage (V-OC). Given a solar cell, its V-OC can be enhanced by several routes, for example, reducing the defect density within the absorber, applying passivating contacts, and reducing the absorber thickness. In this work, we investigate the impact of wafer thickness in crystalline silicon (c-Si) solar cells from the viewpoint of the photovoltaic performance at elevated temperatures. It is confirmed experimentally that the V-OC of c-Si solar cells increases by thinning the Si wafer, for example, V-OC >= 0.75 V is obtained at a wafer thickness of <60 mu m with a conversion efficiency of 22.7%, if surface recombination is sufficiently suppressed. It is also confirmed that thin c-Si cells exhibiting high V-OC show less temperature dependence. As a result, the optimum wafer thickness for maximizing the efficiency decreases with the increase in temperature according to the relation of -1.1 mu m/degrees C. Numerical simulation predicts that this tendency becomes more emphasized with the suppression of Shockley-Read-Hall recombination. These findings suggest that the device structure of c-Si solar cells including the choice of the wafer thickness should be optimized depending on the operating temperature in the field.