Self-Balancing Trinary Asymmetric Three-Phase Multilevel Inverter

被引：0

作者：

Rajesh, V ^{[1
]}

Chattopadhyay, Sumit K. ^{[2
]}

Chakraborty, Chandan ^{[3
]}

机构：

[1] IIT Kharagpur, Dept Elect Engn, Khargpur, India

[2] IIT Delhi, Ctr Energy Studies, New Delhi, India

[3] IIT Kharagpur, Dept Elect Engn, Kharagpur, W Bengal, India

来源：

IECON 2018 - 44TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY | 2018年

关键词：

Capacitor-balancing; asymmetric multilevel inverter; trinary asymmetric ratio; TOPOLOGY;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a cascaded H-bridge multilevel inverter with single dc source. The dc link voltages of the H-bridges maintain a trinary asymmetric ratio among them. The inverter generates a phase voltage with seven levels and a line voltage with thirteen levels at unity modulation index. Voltage of the floating capacitor is self-balanced in open loop irrespective of the initial conditions. This is achieved by utilizing the redundancies associated with the space vectors of a three-phase trinary asymmetric multilevel inverter. Regardless of the modulation index and power factor, self-balancing of capacitor voltage is achieved. Simulation of the proposed converter is carried out in MATLAB/ SIMULINK

引用

页码：4480 / 4485

页数：6

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