The CLARO ASIC: Design and Performance of Prototype Integrated Circuits for Fast Single Photon Counting at Low Power

The CLARO is an ASIC for single photon counting with pixellated photomultipliers, designed to sustain a high counting rate at low power. It was primarily developed to readout multi-anode photomultipliers (Ma-PMTs) in the upgraded LHCb RICH detectors at the LHC. The first four-channel prototype, named CLARO-CMOS, was realized in a 0.35 mu m CMOS technology, demonstrating the capability to count single photons at very high rates, up to 10 MHz, with a low power consumption of about 1 mW per channel. In this paper, the first tests of the single photon counting performance of the CLARO-CMOS coupled to a Hamamatsu R11265 multi-anode photomultiplier tube are presented.