Enabling Cutting-Edge Semiconductor Simulation through Grid Technology

The progressive CMOS scaling drives the success or the global semiconductor industry. Detailed knowledge of transistor behaviour is necessary to overcome the many fundamental challenges faced by chip and systems designers. Grid technology has enabled the constantly increasing statistical variability introduced by discreteness of charge and matter to be examined in unprecedented detail. Over 200,000 transistors subject to random discrete dopants variability have been simulated, the results of which provide detailed insight into underlying physical processes. This paper outlines recent scientific results of the nanoCMOS project, and describes the way in which the scientific goals have been reflected in the grid-based e-infrastructure.