Application of DC analyzer to combinatorial optimization problems

被引:0
|
作者
Trivedi, Gaurav [1 ]
Punglia, Sumit [1 ]
Narayanan, H. [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India
关键词
D O I
10.1109/VLSID.2007.39
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Solution of many combinatorial optimization problems can be found by analyzing appropriate electrical networks made up of positive resistors, voltage sources, current sources and ideal diodes. This method is an alternative approach for the approximate solution of such problems. Two Graph method based fast simulator is a more suitable option for this purpose than Modified Nodal Analysis based conventional simulators. Using this approach we have made an attempt to solve min cost flow and single source shortest path problems. A planar min cost flow problem of size 200, 000 nodes and 600, 000 edges is solved by our simulator approximately within 0.1% of the optimum solution in about 11 mins. We have exactly solved a planar single source shortest path problem (having negative edge weights also) of size 100, 000 nodes and 600, 000 edges in about 2 mins. We have performed our experiments on a PIV processor having 1 GB RAM.
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页码:869 / +
页数:2
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