Digital control of the parallel interleaved solar array regulator using the digital signal processor

被引：0

作者：

Bae, H. S. ^{[1
]}

Park, S. H. ^{[1
]}

Lee, J. H. ^{[1
]}

Cho, B. H. ^{[1
]}

Jang, S. S. ^{[2
]}

机构：

[1] Seoul Natl Univ, Dept Elect Engn, San 56-1, Seoul 151742, South Korea

[2] Korea Aerospace Res Inst, Satellite Elect Dept, Satellite Technol Div, Daejeon 305333, South Korea

来源：

2006 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-7 | 2006年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a digital control approach for the parallel interleaved solar array regulator (SAR) is proposed. The proposed control scheme achieves stable operation in the entire region of the solar array (SA). Additionally, by making the effective load characteristic of the SAR seen by the SA as a resistive load sink, the current sharing among the converter modules is possible. Also, this method can be applied to conventional parallel buck and boost converters. The small signal analysis with the digital sampling effect is performed. A SAR system that consists of two 100W parallel module buck converters with a TMS320F2812 DSP has been experimented using a real 200W solar array to validate the proposed digital control scheme.

引用

页码：1999 / +

页数：2

共 50 条

[21] Medical ultrasound digital beamforming on a massively parallel processor array platform
Chen, Paul
Butts, Mike
Budlong, Brad
MEDICAL IMAGING 2008: ULTRASONIC IMAGING AND SIGNAL PROCESSING, 2008, 6920
[22] Fault-tolerant solar array control using digital signal processing for peak power tracking
Griesbach, CR
IECEC 96 - PROCEEDINGS OF THE 31ST INTERSOCIETY ENERGY CONVERSION ENGINEERING CONFERENCE, VOLS 1-4, 1996, : 260 - 265
[23] Microsatellite Solar Array Regulator Digital Twin Development and Validation
Casado, Pablo
Blanes, Jose M.
Torres, Cristian
Garrigos, Ausias
Marroqui, David
Orts, Carlos
2023 13TH EUROPEAN SPACE POWER CONFERENCE, ESPC, 2023,
[24] Position Sensorless Control for PMBLDC Motor Drive Using Digital Signal Processor
Singh, Sachin
Singh, Sanjeev
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (07)
[25] REAL-TIME LINEAR QUADRATIC CONTROL USING DIGITAL SIGNAL PROCESSOR
Slavov, T.
Mollov, L.
Petkov, P.
TWMS JOURNAL OF PURE AND APPLIED MATHEMATICS, 2012, 3 (02): : 145 - 157
[26] The digital signal processor derby
Eyre, J
IEEE SPECTRUM, 2001, 38 (06) : 62 - +
[27] DIGITAL SIGNAL PROCESSOR ICS
BONET, L
WILLIAMS, TA
VLSI SYSTEMS DESIGN, 1988, 9 (12): : 76 - &
[28] Reconfigurable Signal Processor Designs for Advanced Digital Array Radar Systems
Suarez, Hernan
Zhang, Yan
Yu, Xining
RADAR SENSOR TECHNOLOGY XXI, 2017, 10188
[29] A reconfigurable digital signal processor
Tan, BK
Ogawa, T
Yoshimura, R
Taniguchi, K
IEICE TRANSACTIONS ON ELECTRONICS, 1998, E81C (09): : 1424 - 1430
[30] Digital signal processor trends
Frantz, G
IEEE MICRO, 2000, 20 (06) : 52 - 59

← 1 2 3 4 5 →