Verifying nonlinear analog and mixed-signal circuits with inputs

被引:1
|
作者
Fan, Chuchu [1 ]
Meng, Yu [1 ]
Maier, Juergen [2 ]
Bartocci, Ezio [2 ]
Mitra, Sayan [1 ]
Schmid, Ulrich [2 ]
机构
[1] Univ Illinois, Urbana, IL 61801 USA
[2] Tech Univ Wien, Vienna, Austria
来源
IFAC PAPERSONLINE | 2018年 / 51卷 / 16期
基金
奥地利科学基金会; 美国国家科学基金会;
关键词
D O I
10.1016/j.ifacol.2018.08.041
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
We present a new technique for verifying nonlinear and hybrid models with inputs. We observe that once an input signal is fixed, the sensitivity analysis of the model can be computed much more precisely. Based on this result, we propose a new simulation-driven verification algorithm and apply it to a suite of nonlinear and hybrid models of CMOS digital circuits under different input signals. The models are low-dimensional but with highly nonlinear ODEs, with nearly hundreds of logarithmic and exponential terms. Some of our experiments analyze the metastability of bistable circuits with very sensitive ODEs and rigorously establish the connection between metastability recovery time and sensitivity. (C) 2018, IFAC (International Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved.
引用
收藏
页码:241 / 246
页数:6
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