Experimental verification of a correlation-based correction algorithm for multi-bit delta-sigma ADCs

被引:2
|
作者
Wang, XS [1 ]
Guo, YH [1 ]
Moon, UK [1 ]
Temes, GC [1 ]
机构
[1] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA
关键词
D O I
10.1109/CICC.2004.1358874
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A multi-chip system was built to provide experimental verification of a correlation-based digital algorithm, which acquires and corrects all element errors in the internal DAC of a multi-bit delta-sigma ADC. The proposed correction method does not rely on noise shaping, and hence it remains fully effective even for very low oversampling ratios (OSRs). Measured results obtained for OSR = 4 confirmed that a 12 dB SNDR improvement can be achieved using such digital correction, while only 1similar to2 dB with the commonly used mismatch-shaping technique.
引用
收藏
页码:523 / 526
页数:4
相关论文
共 50 条
  • [1] Wideband Continuous-Time Multi-Bit Delta-Sigma ADCs
    Silva-Martinez, J.
    Lu, C-Y
    Onabajo, M.
    Silva-Rivas, F.
    Dhanasekaran, V.
    Gambhir, M.
    ANALOG CIRCUIT DESIGN: ROBUST DESIGN, SIGMA DELTA CONVERTERS, RFID, 2011, : 203 - 226
  • [2] Multi-bit Delta-Sigma Modulator Using a Modified DWA Algorithm
    Chien-Hung Kuo
    Tzu-Chien Hsueh
    Shen-Iuan Liu
    Analog Integrated Circuits and Signal Processing, 2002, 33 : 289 - 300
  • [3] Multi-bit delta-sigma modulator using a modified DWA algorithm
    Kuo, CH
    Hsueh, TC
    Liu, SI
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2002, 33 (03) : 289 - 300
  • [4] Simulation of Multi-bit Digital Delta-Sigma Modulator
    Yang, Wen-Rong
    Cheng, Yuan-Yuan
    Wang, Jiong-ming
    2008 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING, VOLS 1 AND 2, 2008, : 337 - 339
  • [5] Circuit design aspects of multi-bit delta-sigma converters
    Geerts, Y
    Steyaert, M
    Sansen, W
    ANALOG CIRCUIT DESIGN: STRUCTURED MIXED-MODE DESIGN, MULTI-BIT SIGMA-DELTA CONVERTERS, SHORT RANGE RF CIRCUITS, 2002, : 181 - 203
  • [6] A low OSR Multi-bit Cascaded Delta-Sigma Modulator
    Zhao, Jianming
    Lai, Fengchang
    Wang, Yongsheng
    ICIEA: 2009 4TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, VOLS 1-6, 2009, : 2569 - 2572
  • [7] Timing Measurement BOST With Multi-Bit Delta-Sigma TDC
    Chujo, Takeshi
    Hirabayashi, Daiki
    Arafune, Takuya
    Shibuya, Shohei
    Sasaki, Shu
    Kobayashi, Haruo
    Tsuji, Masanobu
    Shiota, Ryoji
    Watanabe, Masafumi
    Dobashi, Noriaki
    Umeda, Sadayoshi
    Nakamura, Hideyuki
    Sato, Koshi
    PROCEEDINGS OF THE 2015 IEEE 20TH INTERNATIONAL MIXED-SIGNAL TESTING WORKSHOP (IMSTW), 2015,
  • [8] Feedback-Based Digital Predistorter for Multi-Bit Delta-Sigma Transmitter
    Ebrahimi, Mohammad Mojtaba
    Bassam, S. Aidin
    Helaoui, Mohamed
    Ghannouchi, Fadhel M.
    2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2011,
  • [9] Correlation-based correction of sound velocity inhomogeneities using delta-sigma modulators
    Li, PC
    Huang, JJ
    O'Donnell, M
    ULTRASONIC IMAGING, 2000, 22 (04) : 206 - 213
  • [10] A dynamic element matching circuit for multi-bit delta-sigma modulators
    Katoh, R
    Kobayashi, SY
    Waho, T
    ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 569 - 570