High speed SLVS transmitter and receiver

被引：3
|
作者：
Bulbakov, I. S. [1 ]
Atkin, E. V. [1 ]
Voronin, A. G. [1 ,2 ]
机构：
[1] Natl Res Nucl Univ, MEPhI Moscow Engn Phys Inst, Kashirskoe Highway 31, Moscow 115409, Russia
[2] Moscow MV Lomonosov State Univ, SINP, 1 2 Leninskie Gory,GSP 1, Moscow 119991, Russia
来源：
INTERNATIONAL CONFERENCE ON PARTICLE PHYSICS AND ASTROPHYSICS (ICPPA-2015), PTS 1-4 | 2016年 / 675卷
关键词：
D O I：
10.1088/1742-6596/675/4/042035
中图分类号：
P1 [天文学];
学科分类号：
0704 ;
摘要：
Design of SLVS chip-to-chip communication transmitter/receiver IP block in 180 nm UMC MMRF CMOS process is presented. This block has been developed for study a data transmission over PCBs and/or electrical cables (lines) of few meters length at rates up to 320 Mb/s. Schematic for on-chip tests is also presented. This blocks are used for communication between front-end ASICs and DAQ system.
引用
收藏
页数：4
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