On Package Optics for the High-Speed Serdes Interconnects

被引：0
|
作者：
Vaidyanathan, Ajay K. [1 ]
Yenubari, Praveen Kumar [1 ]
Shanmugapriya, D. [1 ]
Kumar, Sathish R. [1 ]
机构：
[1] Intel Technol India Pvt Ltd, Bangalore, Karnataka, India
来源：
2022 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY & SIGNAL/POWER INTEGRITY, EMCSI | 2022年
关键词：
D O I：
10.1109/EMCSI39492.2022.10050243
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Owing to the ever-increasing data rate requirements on the Data Center Graphics (DCG) products, technologists are always looking for methodologies to improve power efficiency and channel performance of the High-speed IO interconnects. On-package optics provides the opportunity to shorten the Common Electrical IO (CEI) 112G channel length by tens of millimeters to enable a very short distance between ASIC and optics. This paper presents the on-package optical IC implementation that shrinks the electrical channel length drastically and thereby the losses and noise coupling between serdes channels.
引用
收藏
页码：459 / 459
页数：1
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