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- [21] A HIGH-SPEED REALIZATION OF A RESIDUE TO BINARY NUMBER SYSTEM CONVERTER IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1995, 42 (10): : 661 - 663
- [22] Comments on "A high speed realization of a residue to binary number system converter" IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1998, 45 (03): : 446 - 447
- [23] FAST MEMORYLESS, OVER 64 BITS, RESIDUE-TO-BINARY CONVERTER IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1985, 32 (03): : 298 - 300
- [24] A New Residue to Binary Converter Based on Mixed-Radix Conversion 2008 3RD INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES: FROM THEORY TO APPLICATIONS, VOLS 1-5, 2008, : 2495 - +
- [26] Design of residue-to-binary converter for a new 5-moduli superset residue number system 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 841 - 844
- [28] A Novel FPGA Design of Modified Residue to Binary Converter for three moduli set 2013 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN VLSI, EMBEDDED SYSTEM, NANO ELECTRONICS AND TELECOMMUNICATION SYSTEM (ICEVENT 2013), 2013,
- [29] Efficient modulo extraction for CRT based residue to binary converters ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 2036 - 2039