Windowed Integration Sampling in Bio-Signal Front-End Design

The application of closed-loop windowed integration sampling (WIS) to the design of a CMOS closed-loop, low-noise, low-power front-end circuit for bio-signal acquisition is described. The inherent anti-aliasing of the WIS scheme enables direct sampling and amplification of input signals from sensors with minimal aliasing. The resulting signals are further conditioned by a switched-capacitor filter (SCF) prior to digitization. Consequently, the overall closed-loop transfer function is determined by precision capacitor ratios. The concepts are validated via a peripheral nerve signal (PNS) recording front-end designed and fabricated in a TSMC 180nm CMOS process. The circuit draws 17.3 mu A from V-DD = 1.8 V, achieves an input-referred noise of 1.68 mu V-rms (integrated from 10 Hz - 50 kHz) and a noise efficiency factor (NEF) of 2.84. The bandwidth extends from 220 Hz to 9.1 kHz with an overall mid-band gain of 56.9 dB. The die area is 0.24 mm(2) including the clock generator.