Triple-Stacked Au/SiO2 Hybrid Bonding With 6-μm-Pitch Au Electrodes on Silicon-on-Insulator Substrates Using O2 Plasma Surface Activation for 3-D Integration

In this paper, we have developed multilayer bonding technology to stack complementary metal-oxide semiconductor (CMOS) circuits. The steps include repeated embedding of gold (Au) electrodes, hybrid bonding of Au and SiO2 on a silicon-on-insulator (SOI) substrate using surface activation with O-2 plasma, and subsequent elimination of the Si substrate. Furthermore, the characteristics of Au/SiO2 hybrid bonding via O-2 plasma are tested with the fabrication of a triple-stacked daisy-chain test device using 3-mu m-diameter Au electrodes at a pitch of 6 mu m. When the surface is activated using O-2 plasma before bonding, the bonding strength increases approximately four times stronger than that when the surface activation is performed with sequential plasmas of Ar and O-2. This additional strength ensures that the bonded interface remains intact while the layers are stacked. A prototype device is manufactured with alignment errors of approximately 0.4 mu m at the center and approximately 1 mu m at the corners. No voids are seen in the two bonded interfaces, and more than 984 000 Au contacts are produced, each having an average resistance of 92.8 m Omega. These results indicate that the proposed multilayer stacking technology is promising for developing high-performance 3-D integrated circuits, 3-D integrated CMOS image sensors, and microelectromechanical systems based on SOI substrates.