28nm FDSOI CMOS technology (FEOL and BEOL) thermal stability for 3D Sequential Integration: yield and reliability analysis

被引:22
|
作者
Cavalcante, C. [1 ,4 ]
Fenouillet-Beranger, C. [1 ]
Batude, P. [1 ]
Garros, X. [1 ]
Federspiel, X. [3 ]
Lacord, J. [1 ]
Kerdiles, S. [1 ]
Royet, A. S. [1 ]
Acosta-Alba, P. [1 ]
Rozeau, O. [1 ]
Barral, V [1 ]
Arnaud, F. [3 ]
Planes, N. [3 ]
Sassoulas, P. O. [3 ]
Ghegin, E. [3 ]
Beneyton, R. [3 ]
Gregoire, M. [3 ]
Weber, O. [3 ]
Guerin, C. [1 ]
Arnaud, L. [1 ]
Moreau, S. [1 ]
Kies, R. [1 ]
Romano, G. [1 ]
Rambal, N. [1 ]
Magalhaes, A. [1 ]
Ghibaudo, G. [2 ]
Colinge, J. P. [1 ]
Vinet, M. [1 ]
Andrieu, F. [1 ]
机构
[1] CEA LETI, Grenoble Alpes, France
[2] IMEP LAHC, Crolles, France
[3] STMicroelectronics, Crolles, France
[4] Univ Grenoble Alpes, Grenoble, France
关键词
D O I
10.1109/vlsitechnology18217.2020.9265075
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
For the first time, the thermal stability of a 28nm FDSOI CMOS technology is evaluated with yield measurements (5Mbit dense SRAM and 1 Million Flip-flops). It is shown that 500 degrees C 2h thermal budget can be applied on a digital 28nm circuit including State-Of-The-Art Cu/ULK BEOL without yield nor reliability degradation. These results pave the way to the introduction of BEOL between tiers in 3D sequential integration while the thermal budget allowed for the top tier is sufficient to lead to high performance device.
引用
收藏
页数:2
相关论文
共 31 条
  • [31] A comparative 3D simulation approach with extensive experimental Vt/Avt data and analysis of LER/RDF/reliability of CMOS SRAMs at 40-nm node and beyond
    Okada, Takako
    Yoshimura, Hisao
    Aikawa, Hisashi
    Sengoku, Mitsuhiro
    Fujii, Osamu
    Oyamatsu, Hisato
    SISPAD 2010 - 15TH INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2010, : 121 - 124